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Complete Symbolic Simulation of SystemC Models = Efficient Formal Verification of Finite Non-Terminating Programs /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Complete Symbolic Simulation of SystemC Models/ by Vladimir Herdt.
Reminder of title:	Efficient Formal Verification of Finite Non-Terminating Programs /
Author:	Herdt, Vladimir.
Description:	XIX, 162 p. 26 illus.online resource. :
Contained By:	Springer Nature eBook
Subject:	Computer hardware. -
Online resource:	https://doi.org/10.1007/978-3-658-12680-3
ISBN:	9783658126803

Complete Symbolic Simulation of SystemC Models = Efficient Formal Verification of Finite Non-Terminating Programs /
Herdt, Vladimir.

Complete Symbolic Simulation of SystemC ModelsEfficient Formal Verification of Finite Non-Terminating Programs /[electronic resource] :by Vladimir Herdt. - 1st ed. 2016. - XIX, 162 p. 26 illus.online resource. - BestMasters,2625-3577. - BestMasters,.

Verification of Systems -- Introduction to Formal Verification of SystemC Models -- Symbolic Model Checking with Partial Order Reduction -- Efficient Symbolic State Matching using State Subsumption -- Heuristic Approaches for Symbolic State Matching -- Evaluation of Proposed Techniques.

In his master thesis, Vladimir Herdt presents a novel approach, called complete symbolic simulation, for a more efficient verification of much larger (non-terminating) SystemC programs. The approach combines symbolic simulation with stateful model checking and allows to verify safety properties in (cyclic) finite state spaces, by exhaustive exploration of all possible inputs and process schedulings. The state explosion problem is alleviated by integrating two complementary reduction techniques. Compared to existing approaches, the complete symbolic simulation works more efficiently, and therefore can provide correctness proofs for larger systems, which is one of the most challenging tasks, due to the ever increasing complexity. Contents Verification of Systems Introduction to Formal Verification of SystemC Models Symbolic Model Checking with Partial Order Reduction Efficient Symbolic State Matching using State Subsumption Heuristic Approaches for Symbolic State Matching Evaluation of Proposed Techniques Target Groups Lecturers and Students of Computer Sciences and Electrical Engineering Hardware Designers and Verification Engineers using SystemC The Author Vladimir Herdt is working as Research Assistant in the Group of Computer Architecture at the University of Bremen, where he is pursuing his PhD degree. .

ISBN: 9783658126803

Standard No.: 10.1007/978-3-658-12680-3doiSubjects--Topical Terms:

1069242
Computer hardware.

LC Class. No.: QA75.5-76.95

Dewey Class. No.: 004

Complete Symbolic Simulation of SystemC Models = Efficient Formal Verification of Finite Non-Terminating Programs /
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