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Tools and Algorithms for the Constru...
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Beyer, Dirk.
Tools and Algorithms for the Construction and Analysis of Systems = 24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part II /
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Tools and Algorithms for the Construction and Analysis of Systems/ edited by Dirk Beyer, Marieke Huisman.
其他題名:
24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part II /
其他作者:
Beyer, Dirk.
面頁冊數:
XX, 465 p. 92 illus.online resource. :
Contained By:
Springer Nature eBook
標題:
Computer logic. -
電子資源:
https://doi.org/10.1007/978-3-319-89963-3
ISBN:
9783319899633
Tools and Algorithms for the Construction and Analysis of Systems = 24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part II /
Tools and Algorithms for the Construction and Analysis of Systems
24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part II /[electronic resource] :edited by Dirk Beyer, Marieke Huisman. - 1st ed. 2018. - XX, 465 p. 92 illus.online resource. - Theoretical Computer Science and General Issues ;10806. - Theoretical Computer Science and General Issues ;9163.
Concurrent and Distributed Systems -- Computing the concurrency threshold of sound free-choice workflow nets -- Fine-Grained Complexity of Safety Verification -- Parameterized verification of synchronization in constrained reconfigurable broadcast networks -- EMME: a formal tool for the ECMAScript Memory Model Evaluation -- SAT and SMT II -- What a Difference a Variable Makes -- Abstraction Refinement for Emptiness Checking of Alternating Data Automata -- Revisiting Enumerative Instantiation -- An Non-linear Arithmetic Procedure for Control-Command Software Verification -- Security and Reactive Systems -- Approximate Reduction of Finite Automata for High-Speed Network Intrusion Detection -- Validity-Guided Synthesis of Reactive Systems from Assume-Guarantee Contracts -- RVHyper: A Runtime Verification Tool for Temporal Hyperproperties -- The Refinement Calculus of Reactive Systems Toolset -- Static and Dynamic Program Analysis -- TESTOR: A Modular Tool for On-the-Fly Conformance Test Case Generation -- Optimal Dynamic Partial Order Reduction with Observers -- Structurally Defined Conditional Data-flow Static Analysis -- Geometric Nontermination Arguments -- Hybrid and Stochastic Systems -- Efficient dynamic error reduction for hybrid systems reachability analysis -- AMT2.0: Qualitative and Quantitative Trace Analysis with Extended Signal Temporal Logic -- Multi-Cost Bounded Reachability in MDPs -- A Statistical Model Checker for Nondeterminism and Rare Events -- Temporal logic and mu-calculus -- Permutation Games for the Weakly Aconjunctive mu-Calculus -- Symmetry Reduction for the Local Mu-Calculus -- Bayesian Statistical Parameter Synthesis for Linear Temporal Properties of Stochastic Models -- 7th Competition on Software Verification (SV-COMP) -- 2LS: Memory Safety and Non-Termination (Competition contribution) -- Yogar-CBMC: CBMC with Scheduling Constraint Based Abstraction Refinement (Competition Contribution) -- CPA-BAM-Slicing: Block-Abstraction Memorization and Slicing with Region-Based Dependency Analysis (Competition Contribution) -- InterpChecker: Reducing State Space via Interpolations (Competition Contribution) -- Map2Check using LLVM and KLEE (Competition Contribution) -- Symbiotic 5: Boosted Instrumentation (Competition Contribution) -- Ultimate Automizer and the Search for Perfect Interpolants (Competition Contribution) -- Ultimate Taipan with Dynamic Block Encoding (Competition Contribution) -- VeriAbs : Verification by Abstraction and Test Generation (Competition Contribution).
Open Access
This book is Open Access under a CC BY licence.
ISBN: 9783319899633
Standard No.: 10.1007/978-3-319-89963-3doiSubjects--Topical Terms:
786340
Computer logic.
LC Class. No.: QA76.9.L63
Dewey Class. No.: 005.1015113
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