國立虎尾科技大學 |

High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications

Record Type:	Language materials, printed : Monograph/item
Title/Author:	High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications / by Weitao Li, Fule Li, Zhihua Wang.
Author:	Li, Weitao.
other author:	Li, Fule.
Description:	XIV, 171 p. 141 illus., 56 illus. in color.online resource. :
Contained By:	Springer Nature eBook
Subject:	Electronic circuits. -
Online resource:	https://doi.org/10.1007/978-3-319-62012-1
ISBN:	9783319620121

High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications
Li, Weitao.

High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications [electronic resource] /by Weitao Li, Fule Li, Zhihua Wang. - 1st ed. 2018. - XIV, 171 p. 141 illus., 56 illus. in color.online resource. - Analog Circuits and Signal Processing,1872-082X. - Analog Circuits and Signal Processing,.

Introduction -- ADC Architecture -- Reference Voltage Buffer -- Amplification -- Comparator -- Calibration -- Design Case -- Contributions and Future Directions.

This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won’t want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.

ISBN: 9783319620121

Standard No.: 10.1007/978-3-319-62012-1doiSubjects--Topical Terms:

563332
Electronic circuits.

LC Class. No.: TK7888.4

Dewey Class. No.: 621.3815

High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications
LDR:02813nam a22004095i 4500 001 995970
003 DE-He213
005 20200630014826.0
007 cr nn 008mamaa
008 201225s2018 gw | s |||| 0|eng d
020 $a 9783319620121 $9 978-3-319-62012-1
024 7 $a 10.1007/978-3-319-62012-1 $2 doi
035 $a 978-3-319-62012-1
050 4 $a TK7888.4
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
072 7 $a TJFC $2 thema
082 0 4 $a 621.3815 $2 23
100 1 $a Li, Weitao. $e author. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1287099
245 1 0 $a High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications $h [electronic resource] / $c by Weitao Li, Fule Li, Zhihua Wang.
250 $a 1st ed. 2018.
264 1 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2018.
300 $a XIV, 171 p. 141 illus., 56 illus. in color. $b online resource.
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
347 $a text file $b PDF $2 rda
490 1 $a Analog Circuits and Signal Processing, $x 1872-082X
505 0 $a Introduction -- ADC Architecture -- Reference Voltage Buffer -- Amplification -- Comparator -- Calibration -- Design Case -- Contributions and Future Directions.
520 $a This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won’t want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.
650 0 $a Electronic circuits. $3 563332
650 0 $a Electronics. $3 596389
650 0 $a Microelectronics. $3 554956
650 1 4 $a Circuits and Systems. $3 670901
650 2 4 $a Electronic Circuits and Devices. $3 782968
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 670219
700 1 $a Li, Fule. $e author. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1287100
700 1 $a Wang, Zhihua. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1021039
710 2 $a SpringerLink (Online service) $3 593884
773 0 $t Springer Nature eBook
776 0 8 $i Printed edition: $z 9783319620114
776 0 8 $i Printed edition: $z 9783319620138
776 0 8 $i Printed edition: $z 9783319872131
830 0 $a Analog Circuits and Signal Processing, $x 1872-082X $3 1254348
856 4 0 $u https://doi.org/10.1007/978-3-319-62012-1
912 $a ZDB-2-ENG
912 $a ZDB-2-SXE
950 $a Engineering (SpringerNature-11647)
950 $a Engineering (R0) (SpringerNature-43712)