國立虎尾科技大學 |

Model and Design of Improved Current Mode Logic Gates = Differential and Single-ended /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Model and Design of Improved Current Mode Logic Gates/ by Kirti Gupta, Neeta Pandey, Maneesha Gupta.
Reminder of title:	Differential and Single-ended /
Author:	Gupta, Kirti.
other author:	Pandey, Neeta.
Description:	XIV, 171 p. 100 illus., 2 illus. in color.online resource. :
Contained By:	Springer Nature eBook
Subject:	Computer communication systems. -
Online resource:	https://doi.org/10.1007/978-981-15-0982-7
ISBN:	9789811509827

Model and Design of Improved Current Mode Logic Gates = Differential and Single-ended /
Gupta, Kirti.

Model and Design of Improved Current Mode Logic GatesDifferential and Single-ended /[electronic resource] :by Kirti Gupta, Neeta Pandey, Maneesha Gupta. - 1st ed. 2020. - XIV, 171 p. 100 illus., 2 illus. in color.online resource.

Introduction -- Current Mode Logic (CML): Basic concepts -- Differential CML Gates with Modified PDN -- CML Gates with Modified Current Source -- CML Gates with Modified Load -- PFSCL Circuits with Reduced Gate Count -- Tri-State CML Circuits.

This book presents MOSFET-based current mode logic (CML) topologies, which increase the speed, and lower the transistor count, supply voltage and power consumption. The improved topologies modify the conventional PDN, load, and the current source sections of the basic CML gates. Electronic system implementation involves embedding digital and analog circuits on a single die shifting towards mixed-mode circuit design. The high-resolution, low-power and low-voltage analog circuits are combined with high-frequency complex digital circuits, and the conventional static CMOS logic generates large current spikes during the switching (also referred to as digital switching noise), which degrade the resolution of the sensitive analog circuits via supply line and substrate coupling. This problem is exacerbated further with scaling down of CMOS technology due to higher integration levels and operating frequencies. In the literature, several methods are described to reduce the propagation of the digital switching noise. However, in high-resolution applications, these methods are not sufficient. The conventional CMOS static logic is no longer an effective solution, and therefore an alternative with reduced current spikes or that draws a constant supply current must be selected. The current mode logic (CML) topology, with its unique property of requiring constant supply current, is a promising alternative to the conventional CMOS static logic.

ISBN: 9789811509827

Standard No.: 10.1007/978-981-15-0982-7doiSubjects--Topical Terms:

1115394
Computer communication systems.

LC Class. No.: TK5105.5-5105.9

Dewey Class. No.: 004.6

Model and Design of Improved Current Mode Logic Gates = Differential and Single-ended /
LDR:03091nam a22003975i 4500 001 1018587
003 DE-He213
005 20200702174415.0
007 cr nn 008mamaa
008 210318s2020 si | s |||| 0|eng d
020 $a 9789811509827 $9 978-981-15-0982-7
024 7 $a 10.1007/978-981-15-0982-7 $2 doi
035 $a 978-981-15-0982-7
050 4 $a TK5105.5-5105.9
072 7 $a UKN $2 bicssc
072 7 $a COM075000 $2 bisacsh
072 7 $a UKN $2 thema
082 0 4 $a 004.6 $2 23
100 1 $a Gupta, Kirti. $e author. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1313600
245 1 0 $a Model and Design of Improved Current Mode Logic Gates $h [electronic resource] : $b Differential and Single-ended / $c by Kirti Gupta, Neeta Pandey, Maneesha Gupta.
250 $a 1st ed. 2020.
264 1 $a Singapore : $b Springer Singapore : $b Imprint: Springer, $c 2020.
300 $a XIV, 171 p. 100 illus., 2 illus. in color. $b online resource.
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
347 $a text file $b PDF $2 rda
505 0 $a Introduction -- Current Mode Logic (CML): Basic concepts -- Differential CML Gates with Modified PDN -- CML Gates with Modified Current Source -- CML Gates with Modified Load -- PFSCL Circuits with Reduced Gate Count -- Tri-State CML Circuits.
520 $a This book presents MOSFET-based current mode logic (CML) topologies, which increase the speed, and lower the transistor count, supply voltage and power consumption. The improved topologies modify the conventional PDN, load, and the current source sections of the basic CML gates. Electronic system implementation involves embedding digital and analog circuits on a single die shifting towards mixed-mode circuit design. The high-resolution, low-power and low-voltage analog circuits are combined with high-frequency complex digital circuits, and the conventional static CMOS logic generates large current spikes during the switching (also referred to as digital switching noise), which degrade the resolution of the sensitive analog circuits via supply line and substrate coupling. This problem is exacerbated further with scaling down of CMOS technology due to higher integration levels and operating frequencies. In the literature, several methods are described to reduce the propagation of the digital switching noise. However, in high-resolution applications, these methods are not sufficient. The conventional CMOS static logic is no longer an effective solution, and therefore an alternative with reduced current spikes or that draws a constant supply current must be selected. The current mode logic (CML) topology, with its unique property of requiring constant supply current, is a promising alternative to the conventional CMOS static logic.
650 0 $a Computer communication systems. $3 1115394
650 0 $a Logic design. $3 561473
650 1 4 $a Computer Communication Networks. $3 669310
650 2 4 $a Logic Design. $3 670915
700 1 $a Pandey, Neeta. $e author. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1313601
700 1 $a Gupta, Maneesha. $e author. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1313602
710 2 $a SpringerLink (Online service) $3 593884
773 0 $t Springer Nature eBook
776 0 8 $i Printed edition: $z 9789811509810
776 0 8 $i Printed edition: $z 9789811509834
776 0 8 $i Printed edition: $z 9789811509841
856 4 0 $u https://doi.org/10.1007/978-981-15-0982-7
912 $a ZDB-2-SCS
912 $a ZDB-2-SXCS
950 $a Computer Science (SpringerNature-11645)
950 $a Computer Science (R0) (SpringerNature-43710)