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Developing Fpgas as an Acceleration Platform for Data-Intensive Applications.

Record Type:	Language materials, manuscript : Monograph/item
Title/Author:	Developing Fpgas as an Acceleration Platform for Data-Intensive Applications./
Author:	Thomas, James Joe.
Description:	1 online resource (72 pages)
Notes:	Source: Dissertations Abstracts International, Volume: 84-04, Section: B.
Contained By:	Dissertations Abstracts International84-04B.
Subject:	Language. -
Online resource:	click for full text (PQDT)
ISBN:	9798352602911

Developing Fpgas as an Acceleration Platform for Data-Intensive Applications.
Thomas, James Joe.

Developing Fpgas as an Acceleration Platform for Data-Intensive Applications. - 1 online resource (72 pages)

Source: Dissertations Abstracts International, Volume: 84-04, Section: B.

Thesis (Ph.D.)--Stanford University, 2022.

Includes bibliographical references

FPGAs have grown in popularity as compute accelerators in recent years, being deployed in the clouds of Amazon, Alibaba, and Microsoft for either internal tasks like networking acceleration or directly for customers to rent. As their use has grown, it has become increasingly clear that they are fairly unproductive for developers compared to competing platforms like GPUs and CPUs. We aim to close this gap in this dissertation by taking a domain-specific approach. We argue that general-purpose FPGA development tools are fundamentally limited by the complexity of the platform, and therefore focus on building faster and simpler tools for the specific case of streaming data-intensive applications.We first present Fleet, a system for accelerating massively parallel streaming workloads on FPGAs. Fleet provides a simple language for users to define a compute unit that processes a single stream of data, and then automatically replicates the compute unit many times into a memory controller fabric so that the final design can process many independent streams at once. We next present a fast compilation system for Fleet-like applications. Our system leverages the fact that the memory controller design is fixed across applications, and therefore compiles it ahead of time, leaving empty slots for copies of the user's processing unit. The user-visible compile time is thus reduced only to the time required to compile a few copies of the processing unit and replicate them into the prebuilt memory controller. Finally, we leverage the design patterns of identical compute units and streaming DRAM access to design a FPGA accelerator for the problem of finding interesting subgroups in large tabular datasets. This accelerator is able to outperform GPUs and CPUs on a cost per throughput basis due to its customized partitioning of SRAM resources across compute units.

Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2024

Mode of access: World Wide Web

ISBN: 9798352602911Subjects--Topical Terms:

571568
Language.
Index Terms--Genre/Form:

554714
Electronic books.

Developing Fpgas as an Acceleration Platform for Data-Intensive Applications.
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