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A signal integrity engineer's compan...

Ireland, David, (1957-)

A signal integrity engineer's companion : = real-time test and measurement and design simulation /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	A signal integrity engineer's companion :/ Geoff Lawday, David Ireland, and Greg Edlund.
Reminder of title:	real-time test and measurement and design simulation /
Author:	Lawday, Geoff,
other author:	Edlund, Greg.
Published:	Upper Saddle River, NJ :Prentice Hall, : c2008.,
Description:	xxxi, 460 p. :ill. ; : 25 cm.;
Notes:	Includes index.
Series:	Prentice Hall modern semiconductor design series
Subject:	Electronic apparatus and appliances - Design and construction. -
Online resource:	http://www.loc.gov/catdir/toc/ecip0813/2008011981.html
ISBN:	9780131860063 (cloth)

A signal integrity engineer's companion : = real-time test and measurement and design simulation /
Lawday, Geoff,1946-

A signal integrity engineer's companion :real-time test and measurement and design simulation /Geoff Lawday, David Ireland, and Greg Edlund. - Upper Saddle River, NJ :Prentice Hall,c2008. - xxxi, 460 p. :ill. ;25 cm. - Prentice Hall modern semiconductor design series.

Includes index.

ISBN: 9780131860063 (cloth)

LCCN: 2008011981

Nat. Bib. No.: GBA870300bnb

Nat. Bib. Agency Control No.: 014626368UkSubjects--Topical Terms:

596388
Electronic apparatus and appliances
--Design and construction.

LC Class. No.: TK7870.23 / .L39 2008

Dewey Class. No.: 621.3822

A signal integrity engineer's companion : = real-time test and measurement and design simulation /
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015 $2 bnb $a GBA870300
016 7 $2 Uk $a 014626368
020 $a 9780131860063 (cloth)
020 $a 0131860062 (cloth) : $c NT1400
035 $a (OCoLC)213495304
035 $a (OCoLC)ocn213495304
035 $a 15218180
040 $a DLC $c NFU $d BAKER $d BTCTA $d C#P $d DLC $d NFU $d UKM $d YDXCP
041 0 $a eng
050 0 0 $a TK7870.23 $b .L39 2008
082 0 0 $2 22 $a 621.3822
100 1 # $a Lawday, Geoff, $d 1946- $3 636328
245 1 4 $a A signal integrity engineer's companion : $b real-time test and measurement and design simulation / $c Geoff Lawday, David Ireland, and Greg Edlund.
260 $a Upper Saddle River, NJ : $c c2008. $b Prentice Hall,
300 $a xxxi, 460 p. : $b ill. ; $c 25 cm.
440 0 $a Prentice Hall modern semiconductor design series
500 $a Includes index.
650 0 $a Electronic apparatus and appliances $x Design and construction. $3 596388
650 0 $a Electronic apparatus and appliances $x Testing. $3 636329
650 0 $a Oscillators, Electric $x Testing. $3 636330
650 0 $a Signal integrity (Electronics) $3 636331
650 0 $a Signal processing $x Simulation methods. $3 636332
650 0 $a Switching circuits $x Reliability. $3 636333
700 1 $a Edlund, Greg. $3 636334
700 1 # $a Ireland, David, $d 1957- $3 636335
856 4 1 $3 Table of contents only $u http://www.loc.gov/catdir/toc/ecip0813/2008011981.html