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Integrated system-level modeling of ...

Kogel, Tim.

Integrated system-level modeling of network-on-chip enabled multi-processor platforms /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Integrated system-level modeling of network-on-chip enabled multi-processor platforms // Tim Kogel, Rainer Leupers, Heinrich Meyr.
Author:	Kogel, Tim.
other author:	Meyr, Heinrich.
Published:	Dordrecht :Springer, : c2006.,
Description:	xiv, 199 p. :ill. ; : 25 cm.;
Subject:	Multiprocessors. -
Online resource:	http://www.loc.gov/catdir/toc/fy0715/2007440508.html
Online resource:	http://www.loc.gov/catdir/enhancements/fy0825/2007440508-d.html
ISBN:	1402048262 (ebk.)

Integrated system-level modeling of network-on-chip enabled multi-processor platforms /
Kogel, Tim.

Integrated system-level modeling of network-on-chip enabled multi-processor platforms /Tim Kogel, Rainer Leupers, Heinrich Meyr. - Dordrecht :Springer,c2006. - xiv, 199 p. :ill. ;25 cm.

Includes bibliographical references (p. 177-193) and index.

ISBN: 1402048262 (ebk.)

LCCN: 2007440508Subjects--Topical Terms:

636734
Multiprocessors.

LC Class. No.: TK7895.E42 / K64 2006

Dewey Class. No.: 004.16

Integrated system-level modeling of network-on-chip enabled multi-processor platforms /
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100 1 # $a Kogel, Tim. $3 639656
245 1 4 $a Integrated system-level modeling of network-on-chip enabled multi-processor platforms / $c Tim Kogel, Rainer Leupers, Heinrich Meyr.
260 $a Dordrecht : $c c2006. $b Springer,
300 $a xiv, 199 p. : $b ill. ; $c 25 cm.
504 $a Includes bibliographical references (p. 177-193) and index.
650 0 $a Multiprocessors. $3 636734
650 0 $a Systems on a chip. $3 639657
650 0 $a Embedded computer systems. $3 562313
700 1 # $a Meyr, Heinrich. $3 639659
700 1 # $a Leupers, Rainer. $3 639658
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856 4 2 $3 Publisher description $u http://www.loc.gov/catdir/enhancements/fy0825/2007440508-d.html