國立虎尾科技大學 |

Low-Noise Low-Power Design for Phase-Locked Loops = Multi-Phase High-Performance Oscillators /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Low-Noise Low-Power Design for Phase-Locked Loops/ by Feng Zhao, Fa Foster Dai.
Reminder of title:	Multi-Phase High-Performance Oscillators /
Author:	Zhao, Feng.
other author:	Dai, Fa Foster.
Description:	XIII, 96 p. 73 illus., 24 illus. in color.online resource. :
Contained By:	Springer Nature eBook
Subject:	Electronic circuits. -
Online resource:	https://doi.org/10.1007/978-3-319-12200-7
ISBN:	9783319122007

Low-Noise Low-Power Design for Phase-Locked Loops = Multi-Phase High-Performance Oscillators /
Zhao, Feng.

Low-Noise Low-Power Design for Phase-Locked LoopsMulti-Phase High-Performance Oscillators /[electronic resource] :by Feng Zhao, Fa Foster Dai. - 1st ed. 2015. - XIII, 96 p. 73 illus., 24 illus. in color.online resource.

Introduction -- Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL -- A Wide-Band 0.13µm SiGe BiCMOS PLL for X-Band Radar -- Design and Analysis of QVCO with Different Coupling Techniques -- Design and Analysis of a 0.6V QVCO with Capacitive-Coupling Technique -- Conclusions.

This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage. Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters. .

ISBN: 9783319122007

Standard No.: 10.1007/978-3-319-12200-7doiSubjects--Topical Terms:

563332
Electronic circuits.

LC Class. No.: TK7888.4

Dewey Class. No.: 621.3815

Low-Noise Low-Power Design for Phase-Locked Loops = Multi-Phase High-Performance Oscillators /
LDR:02378nam a22003975i 4500 001 968726
003 DE-He213
005 20200703222841.0
007 cr nn 008mamaa
008 201211s2015 gw | s |||| 0|eng d
020 $a 9783319122007 $9 978-3-319-12200-7
024 7 $a 10.1007/978-3-319-12200-7 $2 doi
035 $a 978-3-319-12200-7
050 4 $a TK7888.4
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
072 7 $a TJFC $2 thema
082 0 4 $a 621.3815 $2 23
100 1 $a Zhao, Feng. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1064174
245 1 0 $a Low-Noise Low-Power Design for Phase-Locked Loops $h [electronic resource] : $b Multi-Phase High-Performance Oscillators / $c by Feng Zhao, Fa Foster Dai.
250 $a 1st ed. 2015.
264 1 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2015.
300 $a XIII, 96 p. 73 illus., 24 illus. in color. $b online resource.
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
347 $a text file $b PDF $2 rda
505 0 $a Introduction -- Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL -- A Wide-Band 0.13µm SiGe BiCMOS PLL for X-Band Radar -- Design and Analysis of QVCO with Different Coupling Techniques -- Design and Analysis of a 0.6V QVCO with Capacitive-Coupling Technique -- Conclusions.
520 $a This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage. Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters. .
650 0 $a Electronic circuits. $3 563332
650 0 $a Electronics. $3 596389
650 0 $a Microelectronics. $3 554956
650 0 $a Signal processing. $3 561459
650 0 $a Image processing. $3 557495
650 0 $a Speech processing systems. $3 564428
650 1 4 $a Circuits and Systems. $3 670901
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 670219
650 2 4 $a Signal, Image and Speech Processing. $3 670837
700 1 $a Dai, Fa Foster. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1064175
710 2 $a SpringerLink (Online service) $3 593884
773 0 $t Springer Nature eBook
776 0 8 $i Printed edition: $z 9783319121994
776 0 8 $i Printed edition: $z 9783319122014
776 0 8 $i Printed edition: $z 9783319343709
856 4 0 $u https://doi.org/10.1007/978-3-319-12200-7
912 $a ZDB-2-ENG
912 $a ZDB-2-SXE
950 $a Engineering (SpringerNature-11647)
950 $a Engineering (R0) (SpringerNature-43712)