| 紀錄類型: |
書目-語言資料,印刷品
: Monograph/item
|
| 正題名/作者: |
SystemVerilog for design :/ by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby. |
| 其他題名: |
a guide to using SystemVerilog for hardware design and modeling / |
| 其他題名: |
System Verilog for design |
| 作者: |
Sutherland, Stuart, |
| 其他作者: |
Flake, Peter. |
| 出版者: |
New York, NY :Springer Science+Business Media, : c2010., |
| 面頁冊數: |
xxx, 418 p. :ill. ; : 24 cm.; |
| 標題: |
Computer simulation. - |
| ISBN: |
9781441941251 (pbk.) : |