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SystemVerilog for design : = a guide to using SystemVerilog for hardware design and modeling /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	SystemVerilog for design :/ by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby.
其他題名:	a guide to using SystemVerilog for hardware design and modeling /
其他題名:	System Verilog for design
作者:	Sutherland, Stuart,
其他作者:	Davidmann, Simon.
出版者:	New York, NY :Springer Science+Business Media, : c2010.,
面頁冊數:	xxx, 418 p. :ill. ; : 24 cm.;
標題:	SystemVerilog (Computer hardware description language) -
ISBN:	9781441941251 (pbk.) :

SystemVerilog for design : = a guide to using SystemVerilog for hardware design and modeling /
Sutherland, Stuart,1953-

SystemVerilog for design :a guide to using SystemVerilog for hardware design and modeling /System Verilog for designby Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby. - 2nd ed. - New York, NY :Springer Science+Business Media,c2010. - xxx, 418 p. :ill. ;24 cm.

Includes bibliographical references and index.

ISBN: 9781441941251 (pbk.) :NT4427Subjects--Topical Terms:

1027537
SystemVerilog (Computer hardware description language)

LC Class. No.: TK7885.7 / .S875 2010

Dewey Class. No.: 621.39/2

SystemVerilog for design : = a guide to using SystemVerilog for hardware design and modeling /
LDR:00916cam a2200241 a 4500 001 1104490
005 20230711135834.0
008 230731s2010 nyua b 001 0 eng d
020 $a 9781441941251 (pbk.) : $c NT4427
020 $a 1441941258 (pbk.)
020 $a 9780387364957 (ebk.)
020 $a 0387364951 (ebk.)
035 $a (OCoLC)810279062 $z (OCoLC)692283771
035 $a ocn810279062
040 $a AAA $b eng $c AAA $d OCLCO $d BTCTA $d YDXCP $d OCLCF $d OCLCQ $d Y8N $d OCL $d OCLCO $d NFU
041 0 # $a eng
050 # 4 $a TK7885.7 $b .S875 2010
082 0 4 $a 621.39/2 $2 23
100 1 $a Sutherland, Stuart, $d 1953- $3 1413281
245 1 0 $a SystemVerilog for design : $b a guide to using SystemVerilog for hardware design and modeling / $c by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby.
246 3 # $a System Verilog for design
250 $a 2nd ed.
260 # $a New York, NY : $b Springer Science+Business Media, $c c2010.
300 $a xxx, 418 p. : $b ill. ; $c 24 cm.
504 $a Includes bibliographical references and index.
650 # 0 $a SystemVerilog (Computer hardware description language) $3 1027537
650 # 0 $a Verilog (Computer hardware description language) $3 563915
650 # 0 $a Electronic digital computers $x Design and construction. $3 563916
650 # 0 $a Computer simulation. $3 560190
700 1 # $a Davidmann, Simon. $3 1413282
700 1 # $a Flake, Peter. $3 1413283