Chip scale packaging.

Wafer-level chip-scale packaging = analog and power semiconductor applications / by: (Language materials, printed)

Fan-out wafer-level packaging by: (Language materials, printed)

Advances in embedded and fan-out wafer-level packaging technologies / by: (Language materials, printed)

Embedded and fan-out wafer and panel level packaging technologies for advanced application spaces : = high performance compute and system-in-package / by: (Language materials, printed)

Electronics and Microelectronics, Instrumentation.

Nanotechnology and Microengineering.

Integrated circuits

Microelectronics.

Circuits and Systems.

Engineering Thermodynamics, Heat and Mass Transfer.

Optical and Electronic Materials.

Chip scale packaging.

Engineering.