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透過控制鈷和釕的低電位沉積在TiSi2上逐層沉積鈷釕合金薄膜 = = L...

郭映琦

透過控制鈷和釕的低電位沉積在TiSi2上逐層沉積鈷釕合金薄膜 = = Layer-by-layer deposition of Co(Ru) Films on TiSi2 Substrate by Sequentially Manipulating Underpotential Deposition of Co and Ru /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	透過控制鈷和釕的低電位沉積在TiSi2上逐層沉積鈷釕合金薄膜 =/ 郭映琦.
Reminder of title:	Layer-by-layer deposition of Co(Ru) Films on TiSi2 Substrate by Sequentially Manipulating Underpotential Deposition of Co and Ru /
remainder title:	Layer-by-layer deposition of Co(Ru) Films on TiSi2 Substrate by Sequentially Manipulating Underpotential Deposition of Co and Ru.
Author:	郭映琦
Published:	雲林縣 :國立虎尾科技大學 , : 民113.07.,
Description:	[18], 172面 :圖, 表 ; : 30公分.;
Notes:	指導教授: 方昭訓.
Subject:	Interconnects. -
Online resource:	電子資源

透過控制鈷和釕的低電位沉積在TiSi2上逐層沉積鈷釕合金薄膜 = = Layer-by-layer deposition of Co(Ru) Films on TiSi2 Substrate by Sequentially Manipulating Underpotential Deposition of Co and Ru /
郭映琦

透過控制鈷和釕的低電位沉積在TiSi2上逐層沉積鈷釕合金薄膜 =Layer-by-layer deposition of Co(Ru) Films on TiSi2 Substrate by Sequentially Manipulating Underpotential Deposition of Co and Ru /Layer-by-layer deposition of Co(Ru) Films on TiSi2 Substrate by Sequentially Manipulating Underpotential Deposition of Co and Ru.郭映琦. - 初版. - 雲林縣 :國立虎尾科技大學 ,民113.07. - [18], 172面 :圖, 表 ;30公分.

指導教授: 方昭訓.

碩士論文--國立虎尾科技大學材料科學與工程系材料科學與綠色能源工程碩士班.

含參考書目.

現今科技進步使半導體製程日新月異，技術節點隨之縮小，半導體元件奈米化，銅金屬製程由於其電子平均自由路徑較高，在連導線微縮下會產生電子散射，造成其電阻率急遽上升導致性能下降。為克服銅金屬在先進製程下所遇到的瓶頸，鈷金屬與釕金屬皆擁有較短的電子平均自由路徑，元件尺寸微縮下，鈷和釕在次世代半導體互連導線中成為具有潛力的替代材料。此外釕金屬具有低電阻率、高熔點、高抗氧化性，這些卓越的性質使釕金屬在互連導線應用上不需使用阻障層與襯墊層。本研究利用電化學原子層沉積製備鈷釕合金薄膜，克服元件逐漸小型化導致溝槽深寬比隨之增加的情況，改善傳統真空製程階梯覆蓋率不足的問題。本實驗在TiSi2基板上使用低電位逐層沉積鈷原子層和釕原子層，透過控制不同沉積電位製備鈷釕合金薄膜。實驗首先以循環伏安法獲得鈷與釕溶液在TiSi2基板上的還原電位，透過電流密度-時間曲線得到薄膜總電荷並計算其覆蓋率和成核成長機制，從電流密度-時間的關係圖中求得擴散係數。使用掃描式電子顯微鏡 (Scanning Electron Microscope, SEM)、能量散射光譜儀 (Energy Dispersive Spectroscopy, EDS)、拉曼光譜儀 (Raman Spectra)、X-ray繞射儀 (X-ray Diffraction, XRD)、X射線光電子能譜儀 (X-ray Photoelectron Spectroscopy, XPS)、四點探針 (Four point probe, FPP) 進行薄膜表面形貌、成分、相結構、原子鍵結及電性等分析。由實驗結果得知，在5 mM CoCl2溶液與1 mM RuCl3溶液中，UPD-Ru電位固定為-0.7 V，UPD-Co電位-1.0 V時以電化學原子層逐層沉積50個循環後，每個週期的鈷原子層沉積量是1.05 Monolayer (ML)，釕原子層沉積量是0.94 Monolayer (ML)，透過成核成長曲線得知UPD-Co與UPD-Ru成核機制皆為瞬時成核，此外薄膜具有良好的表面形貌，透過能量散射光譜儀可得該參數所得薄膜之鈷成分與釕成份比例約為1:1。由上述可得知UPD-Co電位-1.0 V與UPD-Ru電位-0.7 V所得之薄膜具有較佳薄膜性質。.

(平裝)Subjects--Topical Terms:

1346159
Interconnects.

透過控制鈷和釕的低電位沉積在TiSi2上逐層沉積鈷釕合金薄膜 = = Layer-by-layer deposition of Co(Ru) Films on TiSi2 Substrate by Sequentially Manipulating Underpotential Deposition of Co and Ru /
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100 1 $a 郭映琦 $3 1448998
245 1 0 $a 透過控制鈷和釕的低電位沉積在TiSi2上逐層沉積鈷釕合金薄膜 = $b Layer-by-layer deposition of Co(Ru) Films on TiSi2 Substrate by Sequentially Manipulating Underpotential Deposition of Co and Ru / $c 郭映琦.
246 1 1 $a Layer-by-layer deposition of Co(Ru) Films on TiSi2 Substrate by Sequentially Manipulating Underpotential Deposition of Co and Ru.
250 $a 初版.
260 # $a 雲林縣 : $b 國立虎尾科技大學 , $c 民113.07.
300 $a [18], 172面 : $b 圖, 表 ; $c 30公分.
500 $a 指導教授: 方昭訓.
500 $a 學年度: 112.
502 $a 碩士論文--國立虎尾科技大學材料科學與工程系材料科學與綠色能源工程碩士班.
504 $a 含參考書目.
520 3 $a 現今科技進步使半導體製程日新月異，技術節點隨之縮小，半導體元件奈米化，銅金屬製程由於其電子平均自由路徑較高，在連導線微縮下會產生電子散射，造成其電阻率急遽上升導致性能下降。為克服銅金屬在先進製程下所遇到的瓶頸，鈷金屬與釕金屬皆擁有較短的電子平均自由路徑，元件尺寸微縮下，鈷和釕在次世代半導體互連導線中成為具有潛力的替代材料。此外釕金屬具有低電阻率、高熔點、高抗氧化性，這些卓越的性質使釕金屬在互連導線應用上不需使用阻障層與襯墊層。本研究利用電化學原子層沉積製備鈷釕合金薄膜，克服元件逐漸小型化導致溝槽深寬比隨之增加的情況，改善傳統真空製程階梯覆蓋率不足的問題。本實驗在TiSi2基板上使用低電位逐層沉積鈷原子層和釕原子層，透過控制不同沉積電位製備鈷釕合金薄膜。實驗首先以循環伏安法獲得鈷與釕溶液在TiSi2基板上的還原電位，透過電流密度-時間曲線得到薄膜總電荷並計算其覆蓋率和成核成長機制，從電流密度-時間的關係圖中求得擴散係數。使用掃描式電子顯微鏡 (Scanning Electron Microscope, SEM)、能量散射光譜儀 (Energy Dispersive Spectroscopy, EDS)、拉曼光譜儀 (Raman Spectra)、X-ray繞射儀 (X-ray Diffraction, XRD)、X射線光電子能譜儀 (X-ray Photoelectron Spectroscopy, XPS)、四點探針 (Four point probe, FPP) 進行薄膜表面形貌、成分、相結構、原子鍵結及電性等分析。由實驗結果得知，在5 mM CoCl2溶液與1 mM RuCl3溶液中，UPD-Ru電位固定為-0.7 V，UPD-Co電位-1.0 V時以電化學原子層逐層沉積50個循環後，每個週期的鈷原子層沉積量是1.05 Monolayer (ML)，釕原子層沉積量是0.94 Monolayer (ML)，透過成核成長曲線得知UPD-Co與UPD-Ru成核機制皆為瞬時成核，此外薄膜具有良好的表面形貌，透過能量散射光譜儀可得該參數所得薄膜之鈷成分與釕成份比例約為1:1。由上述可得知UPD-Co電位-1.0 V與UPD-Ru電位-0.7 V所得之薄膜具有較佳薄膜性質。.
520 3 $a Advancements in technology have led to rapid changes in semiconductor processes, resulting in the reduction of technological nodes and the miniaturization of semiconductor components. In copper metallurgy, the increasing electron scattering due to the shrinking of interconnects has led to a drastic rise in resistivity, thereby compromising performance. To overcome this bottleneck in advanced processes, cobalt, and ruthenium metals, which possess shorter electron mean free paths, have emerged as potential alternative materials in next-generation semiconductor interconnect. Additionally, ruthenium offers low resistivity, high melting point, and excellent oxidation resistance, eliminating the need for barrier and liner layers in interconnect applications. This study employs electrochemical atomic layer deposition to prepare cobalt-ruthenium alloy thin films, addressing the challenges posed by the increasing aspect ratio of trenches as devices shrink, and improving upon the insufficient step coverage of traditional vacuum processes. Using low-potential sequential deposition of cobalt and ruthenium atomic layers on TiSi2 substrates, the experiment controls different deposition potentials to fabricate cobalt-ruthenium alloy thin films. Initially, cyclic voltammetry is utilized to determine the reduction potentials of cobalt and ruthenium solutions on TiSi2 substrates, followed by obtaining total film charge through current density-time curves to calculate coverage and nucleation mechanisms. Diffusion coefficients are derived from current density-time relationships. Surface morphology, composition, phase structure, atomic bonding, and electrical properties are analyzed using scanning electron microscopy (SEM), energy dispersive spectroscopy (EDS), Raman spectroscopy, X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), and four-point probe (FPP). Experimental results reveal that, in 5 mM CoCl2 and 1 mM RuCl3 solutions, with a fixed UPD-Ru potential of -0.7 V and UPD-Co potential of -1.0 V, after electrochemical atomic layer deposition of 50 cycles, the cobalt atomic layer deposition is 1.05 Monolayer (ML) per cycle, while ruthenium deposition is 0.94 ML per cycle. Additionally, the thin films exhibit favorable surface morphology, with EDS indicating a cobalt-to-ruthenium ratio of approximately 1:1. These findings suggest that thin films obtained at UPD-Co -1.0 V and UPD-Ru -0.7 V exhibit superior properties..
563 $a (平裝)
650 # 4 $a Interconnects. $3 1346159
650 # 4 $a Co(Ru) alloy thin films. $3 1450681
650 # 4 $a EC-ALD. $3 1346160
650 # 4 $a Underpotential Deposition. $3 1215703
650 # 4 $a 半導體互連導線. $3 1245729
650 # 4 $a 鈷釕合金薄膜. $3 1245706
650 # 4 $a 電化學原子層沉積. $3 1011300
650 # 4 $a 低電位沉積. $3 1011312
856 7 # $u https://handle.ncl.edu.tw/11296/h2f554 $z 電子資源 $2 http