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Wafer-Level Chip-Scale Packaging = Analog and Power Semiconductor Applications /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Wafer-Level Chip-Scale Packaging/ by Shichun Qu, Yong Liu.
Reminder of title:	Analog and Power Semiconductor Applications /
Author:	Qu, Shichun.
other author:	Liu, Yong.
Description:	XVII, 322 p. 314 illus., 256 illus. in color.online resource. :
Contained By:	Springer Nature eBook
Subject:	Electronics. -
Online resource:	https://doi.org/10.1007/978-1-4939-1556-9
ISBN:	9781493915569

Wafer-Level Chip-Scale Packaging = Analog and Power Semiconductor Applications /
Qu, Shichun.

Wafer-Level Chip-Scale PackagingAnalog and Power Semiconductor Applications /[electronic resource] :by Shichun Qu, Yong Liu. - 1st ed. 2015. - XVII, 322 p. 314 illus., 256 illus. in color.online resource.

Chapter 1. Demand and Challenges for Wafer Level Analog and Power Packaging -- Chapter 2. Fan-In Analog Wafer Level Chip Scale Package -- Chapter 3. Fan-Out Analog Wafer Level Chip Scale Package -- Chapter 4. Wafer Level Analog Chip Scale Package Stackable Design -- Chapter 5. Wafer Level Discrete Power MOSFET Package Design -- Chapter 6. Wafer Level Packaging TSV/Stack die for Integration of Analog and Power Solution -- Chapter 7. Thermal Management, Design, Analysis for WLCSP -- Chapter 8. Electrical and Multi-Physics Simulations for Analog and Power WLCSP -- Chapter 9. WLCSP Typical Assembly Process -- Chapter 10. WLCSP Typical Reliability and Test.

This book presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability, and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials, and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical, and stress modeling methodologies is also provided. This book also: · Covers the development of wafer-level power discrete packaging with regular wafer-level design concepts and directly bumping technology · Introduces the development of the analog and power SIP/3D/TSV/stack die packaging technology · Presents the wafer-level analog IC packaging design through fan-in and fan-out with RDLs.

ISBN: 9781493915569

Standard No.: 10.1007/978-1-4939-1556-9doiSubjects--Topical Terms:

596389
Electronics.

LC Class. No.: TK7800-8360

Dewey Class. No.: 621.381

Wafer-Level Chip-Scale Packaging = Analog and Power Semiconductor Applications /
LDR:03286nam a22004095i 4500 001 967869
003 DE-He213
005 20200701050021.0
007 cr nn 008mamaa
008 201211s2015 xxu| s |||| 0|eng d
020 $a 9781493915569 $9 978-1-4939-1556-9
024 7 $a 10.1007/978-1-4939-1556-9 $2 doi
035 $a 978-1-4939-1556-9
050 4 $a TK7800-8360
050 4 $a TK7874-7874.9
072 7 $a TJF $2 bicssc
072 7 $a TEC008000 $2 bisacsh
072 7 $a TJF $2 thema
082 0 4 $a 621.381 $2 23
100 1 $a Qu, Shichun. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1062721
245 1 0 $a Wafer-Level Chip-Scale Packaging $h [electronic resource] : $b Analog and Power Semiconductor Applications / $c by Shichun Qu, Yong Liu.
250 $a 1st ed. 2015.
264 1 $a New York, NY : $b Springer New York : $b Imprint: Springer, $c 2015.
300 $a XVII, 322 p. 314 illus., 256 illus. in color. $b online resource.
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
347 $a text file $b PDF $2 rda
505 0 $a Chapter 1. Demand and Challenges for Wafer Level Analog and Power Packaging -- Chapter 2. Fan-In Analog Wafer Level Chip Scale Package -- Chapter 3. Fan-Out Analog Wafer Level Chip Scale Package -- Chapter 4. Wafer Level Analog Chip Scale Package Stackable Design -- Chapter 5. Wafer Level Discrete Power MOSFET Package Design -- Chapter 6. Wafer Level Packaging TSV/Stack die for Integration of Analog and Power Solution -- Chapter 7. Thermal Management, Design, Analysis for WLCSP -- Chapter 8. Electrical and Multi-Physics Simulations for Analog and Power WLCSP -- Chapter 9. WLCSP Typical Assembly Process -- Chapter 10. WLCSP Typical Reliability and Test.
520 $a This book presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability, and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials, and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical, and stress modeling methodologies is also provided. This book also: · Covers the development of wafer-level power discrete packaging with regular wafer-level design concepts and directly bumping technology · Introduces the development of the analog and power SIP/3D/TSV/stack die packaging technology · Presents the wafer-level analog IC packaging design through fan-in and fan-out with RDLs.
650 0 $a Electronics. $3 596389
650 0 $a Microelectronics. $3 554956
650 0 $a Electronic circuits. $3 563332
650 0 $a Thermodynamics. $3 596513
650 0 $a Heat engineering. $3 681953
650 0 $a Heat transfer. $3 1085480
650 0 $a Mass transfer. $3 556853
650 1 4 $a Electronics and Microelectronics, Instrumentation. $3 670219
650 2 4 $a Circuits and Systems. $3 670901
650 2 4 $a Engineering Thermodynamics, Heat and Mass Transfer. $3 769147
700 1 $a Liu, Yong. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 890659
710 2 $a SpringerLink (Online service) $3 593884
773 0 $t Springer Nature eBook
776 0 8 $i Printed edition: $z 9781493915552
776 0 8 $i Printed edition: $z 9781493915576
776 0 8 $i Printed edition: $z 9781493954384
856 4 0 $u https://doi.org/10.1007/978-1-4939-1556-9
912 $a ZDB-2-ENG
912 $a ZDB-2-SXE
950 $a Engineering (SpringerNature-11647)
950 $a Engineering (R0) (SpringerNature-43712)